Appreciate mail for BATCH Testing.

[Fwd: Release of OPUS857938 for 5ee16_1m ,d8.0]

...

Jeyendran Kathirvel

Jeyendran Kathirvel

...

ViewWednesday, June 6, 2007 3:04:52 AM

-----Inline Message Follows-----

Hi Jeyendran,

Nice email capturing the summary of the code tested. Guess we could
follow the same format for
all upcoming OPUS / POSTCUT.

Thanks for your effort in testing this OPUS.

Gomathi - So I guess it is a go to release this OPUS ..

bye
gg


Jeyendran Kathirvel wrote:
>
> Hi Ganesh,
>
> The requirement of OPUS 857938 has been tested successfully in the
> customer odd [Lab name : 06160k] with following data correction in
> tkgrp form, i.e., for TRKGRP = 285, the attributes SIRESET, MDRESET,
> ISOLRESET has modified as 'Y'. The mentioned data has been corrected
> to avoid dbgen failure in TM_BLRS relation. Since for a DPC/OPC pair ,
> value of three attributes should be same across different trunk groups.
>
> Following are tested in lab 06160k:
>
> # Fix for prov5561 has tested successfully.
> # Fix for prov5559 has tested successfully.
> # All the forward and reverse side processes has ran successfully in
> the lab 06160k.
> # Before fix and After fix data has been verified.
> # Reverse mapping changes for VLB has verified.
>
> Data Path : http://odindia1:8015/~jeyendra/OPUS_D8.html
> <http://odindia1:8015/%7Ejeyendra/OPUS_D8.html>
>
> /Regards,/
> /Jeyendran Kathirvel./
>
>
> Vijayalakshmi T wrote:
>
>> Hi Ganesh,
>>
>> I've re-packaged the OPUS857938 for 5ee16_1m d8.0 using
>> the following mr
>>
>> Kavipriya:
>> -------
>> oda857938dM
>>
>>
>> The path of the port file is given below
>> /5e/fswmoda/load_build/intfwk/pkgr/5ee16/oda.1.d8.0/port/opus857938
>>
>> Thanks,
>> Viji
>>
>>
>> Vijayalakshmi T wrote:
>>
>>> Hi Ganesh,
>>>
>>> I've re-packaged the OPUS857938 for 5ee16_1m d8.0 using
>>> the following mr's
>>>
>>> Kavipriya:
>>> -------
>>> oda857938cM
>>>
>>> Janaki
>>> -----
>>> oda857862cM
>>>
>>>
>>> The path of the port file is given below
>>> /5e/fswmoda/load_build/intfwk/pkgr/5ee16/oda.1.d8.0/port/opus857938
>>>
>>> Thanks,
>>> Viji
>>>
>>>
>>> Vijayalakshmi T wrote:
>>>
>>>> Hi Ganesh,
>>>>
>>>> I've packaged the OPUS857938 for 5ee16_1m d8.0 using
>>>> the following mr's
>>>>
>>>> Kavipriya:
>>>> -------
>>>> oda857938aM,
>>>> oda857938bM,
>>>> oda838689sM
>>>>
>>>> Janaki:
>>>> -----
>>>> oda857862aM,
>>>> oda857862bM
>>>>
>>>>
>>>> The path of the port file is given below
>>>> /5e/fswmoda/load_build/intfwk/pkgr/5ee16/oda.1.d8.0/port/opus857938
>>>>
>>>>
>>>> Thanks,
>>>> Viji
>>>>
>>>>
>>>> Kavipriya wrote:
>>>>
>>>>> Hi Viji,
>>>>>
>>>>> Please process the MR oda857938aM (xcheck MR) for an OPUS related
>>>>> to prov 5559.
>>>>>
>>>>> Thanks & Regards,
>>>>> Kavipriya K
>>>>>
>>>>> Hi Viji,
>>>>>
>>>>> Please process this MR oda857938bM(rev.mapping
>>>>> MR),oda838689sM(latent bug fix) for an OPUS related to VLB
>>>>> feature. I will give the cross check MR after finishing the changes.
>>>>>
>>>>> --
>>>>> Thanks & Regards,
>>>>> Kavipriya K
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
>>>>>
Hi Jeyendran,

Nice email capturing the summary of the code tested. Guess we could
follow the same format for
all upcoming OPUS / POSTCUT.

Thanks for your effort in testing this OPUS.

Gomathi - So I guess it is a go to release this OPUS ..

bye
gg


Jeyendran Kathirvel wrote:
>
> Hi Ganesh,
>
> The requirement of OPUS 857938 has been tested successfully in the
> customer odd [Lab name : 06160k] with following data correction in
> tkgrp form, i.e., for TRKGRP = 285, the attributes SIRESET, MDRESET,
> ISOLRESET has modified as 'Y'. The mentioned data has been corrected
> to avoid dbgen failure in TM_BLRS relation. Since for a DPC/OPC pair ,
> value of three attributes should be same across different trunk groups.
>
> Following are tested in lab 06160k:
>
> # Fix for prov5561 has tested successfully.
> # Fix for prov5559 has tested successfully.
> # All the forward and reverse side processes has ran successfully in
> the lab 06160k.
> # Before fix and After fix data has been verified.
> # Reverse mapping changes for VLB has verified.
>
> Data Path : http://odindia1:8015/~jeyendra/OPUS_D8.html
> <http://odindia1:8015/%7Ejeyendra/OPUS_D8.html>
>
> /Regards,/
> /Jeyendran Kathirvel./
>
>
> Vijayalakshmi T wrote:
>
>> Hi Ganesh,
>>
>> I've re-packaged the OPUS857938 for 5ee16_1m d8.0 using
>> the following mr
>>
>> Kavipriya:
>> -------
>> oda857938dM
>>
>>
>> The path of the port file is given below
>> /5e/fswmoda/load_build/intfwk/pkgr/5ee16/oda.1.d8.0/port/opus857938
>>
>> Thanks,
>> Viji
>>
>>
>> Vijayalakshmi T wrote:
>>
>>> Hi Ganesh,
>>>
>>> I've re-packaged the OPUS857938 for 5ee16_1m d8.0 using
>>> the following mr's
>>>
>>> Kavipriya:
>>> -------
>>> oda857938cM
>>>
>>> Janaki
>>> -----
>>> oda857862cM
>>>
>>>
>>> The path of the port file is given below
>>> /5e/fswmoda/load_build/intfwk/pkgr/5ee16/oda.1.d8.0/port/opus857938
>>>
>>> Thanks,
>>> Viji
>>>
>>>
>>> Vijayalakshmi T wrote:
>>>
>>>> Hi Ganesh,
>>>>
>>>> I've packaged the OPUS857938 for 5ee16_1m d8.0 using
>>>> the following mr's
>>>>
>>>> Kavipriya:
>>>> -------
>>>> oda857938aM,
>>>> oda857938bM,
>>>> oda838689sM
>>>>
>>>> Janaki:
>>>> -----
>>>> oda857862aM,
>>>> oda857862bM
>>>>
>>>>
>>>> The path of the port file is given below
>>>> /5e/fswmoda/load_build/intfwk/pkgr/5ee16/oda.1.d8.0/port/opus857938
>>>>
>>>>
>>>> Thanks,
>>>> Viji
>>>>
>>>>
>>>> Kavipriya wrote:
>>>>
>>>>> Hi Viji,
>>>>>
>>>>> Please process the MR oda857938aM (xcheck MR) for an OPUS related
>>>>> to prov 5559.
>>>>>
>>>>> Thanks & Regards,
>>>>> Kavipriya K
>>>>>
>>>>> Hi Viji,
>>>>>
>>>>> Please process this MR oda857938bM(rev.mapping
>>>>> MR),oda838689sM(latent bug fix) for an OPUS related to VLB
>>>>> feature. I will give the cross check MR after finishing the changes.
>>>>>
>>>>> --
>>>>> Thanks & Regards,
>>>>> Kavipriya K